Hardware

This is session SPCS001, titled “Technology Insight: Intel Next Generation Microarchitecture Code Name Haswell”. The speakers are Tom Piazza, Hong Jiang, Per Hammarlund, and Ronak Singhal, Sr.

Haswell is a “tock” as opposed to a “tick” (referring to Intel’s “tick/tock” release cycle); this means it is a significant change at the platform and microarchitecture levels. It is a 22nm platform (Ivy Bridge was also 22nm). Haswell will retain key features from the Sandy Bridge/Ivy Bridge platform, like Hyper-Threading, Turbo Boost, and Ring Interconnect.

A key philosophy for the Haswell microarchitecture is the use of a “converged code”; that is, a single microarchitecture that scales from tablets all the way to servers in the datacenter. That might seem odd, but the power advantages present in Haswell are just as applicable to tablets and mobile devices as they are to servers running tens (hundreds?) of cores in the data center.

Major focus areas for Haswell include performance improvements (not only for existing “legacy” code but also for new code), modularity, and power innovations.

With regard to modularity, Haswell enables a variety of permutations of core count, cache size, and other variables. This enables more flexibility by Intel’s OEMs in delivering Haswell to a variety of platforms.

In the area of power innovations, Haswell still uses the S0 and S3/4 (active and sleep, respectively) power states. Intel is working to reduce overall power usage in S0, and working to reduce power usage and resume time for S3/4. Haswell introduces S0ix, which is “active/idle” state, which provides dramatically reduced power usage and dramatically reduced resume time (from multiple seconds to hundreds of milliseconds).

As the presenters went into performance improvements, the presentation got extremely technical. While it probably made sense to a developer (the target audience at IDF), much of it did not make sense to me. I’ve included in the information below in a bulleted format for completeness.

• Increased buffer sizes to allow for greater parallelism to be discovered in code execution
• Enhancements in branch prediction
• The addition of two more operations per cycle (Nehalem/Sandy Bridge could do 6 operations per cycle; Haswell can perform 8 operations per cycle)
• Doubling of floating point operations per cycle through the addition of two Fused Multiply-Add (FMA) operations
• Reduced virtualization latencies (no additional details provided)
• A new gather instruction that allows the system to read multiple locations in memory in one operation
• Introduction of AVX2 instruction set to further improve integer performance and vectorization
• Improved performance in bit manipulation operations; this should have an impact on cipher/encryption/decryption operations
• Introduction of TSX (Transactional Synchronization Extensions) to help with creating software that has greater parallelism

The session next transitioned into some discussions specific to improvements in graphics performance and media performance. Improved modularity in the graphics core allows for more “scale-out” performance; this is responsible for the 2x reduction in power usage for matching graphics performance when using Haswell. (This was part of Perlmutter’s keynote.) With regards to media performance, Haswell introduces hardware-based SVC (Scalable Video Coding) and several hardware codecs, including an MPEG codec. Haswell also improves the Video Quality Engine (VQE), which supports an extensive suite of video processing functions. The end result is higher video quality at lower power usage.

The remainder of the session focused on specific power improvements in the media and graphics space, then closes with a summary of the improvements in the Haswell microarchitecture.

This is a liveblog of the day 1 keynote at Intel Developer Forum (IDF) 2012 at Moscone West in San Francisco, CA. This is my first time attending IDF, and I appreciate the invitation to attend from Intel. (Disclosure: My travel expenses are being reimbursed and I was given a pass to attend, but I am not receiving any other form of compensation.)

Prior to the start of the keynote, they show a video talking about “What misconception about engineers bothers you most?” It’s a collection of snippets talking with various people at the show (probably from last year). It’s a interesting and amusing video. According to the people on the video, the most common misconception is that engineers don’t know how to have fun.

At 9:01, David (Dadi) Perlmutter takes the stage after a short video about Intel. Admirably, Perlmutter recognizes the grave importance of today’s date (9/11), something that I have to give him credit for. I fear that many organizations would not have taken time out of their limited schedule to do so, and I commend Intel.

This year marks the 15th anniversary of IDF, which launched for the very first time in 1997. Today Perlmutter’s discussion will focus on “reinventing computing” (at least, he admits again and not for the last time). Tomorrow’s keynote will focus on security, and Thursday’s keynote is about connecting to the future.

Perlmutter states that “reinventing computing” isn’t just about Intel; it’s about working in collaboration with Intel’s partners and Intel’s developers to “shape the future.” He shows off two hardware samples: the ultra-small Medfield system-on-a-chip (SoC) and the much larger Xeon Phi high-performance computing (HPC) platform. However, it’s not just about hardware–it’s also about the software.

According to Intel and Perlmutter, “data creates opportunities”. There are opportunities for creating digital data, storing digital data, and analyzing digital data. All this leads to cloud and big data.

Perlmutter now shifts his discussion from a broad look at the driving factors in the industry to a more specific look at the data center specifically. And while Intel is involved in the data center–both directly and through a wide array of partners–Perlmutter feels the “real revolution” is in the transformation of personal computing. This, naturally, leads to a discussion of Intel’s Ultrabooks, now equipped with Intel’s 22nm 3rd generation Intel Core processors. He then shows off several different form factors from various Intel OEMs (all of them are running Windows 8). He demonstrates a tablet/slate form factor, as well as a detachable form, the traditional notebook/clamshell, and the convertible form factor.

Going back to his earlier statement about the importance of software, Perlmutter now talks about how software features like sensors, facial recognition, instant on, responsive voice, and others will help enable new experiences in the personal computing arena. This also includes new, more “natural” and “intuitive” computing that employs voice and touch interfaces.

Next up is a demonstration of some new voice interface capabilities that are being jointly developed by Intel and Nuance. The technology and software demonstrated is said to be available in beta form on Q4 of this year.

Following that demonstration, Perlmutter demonstrates some new technologies using gestures. Working with Creative and SoftKinetic, he shows off a few examples of how 3-D cameras and gesture support can enable new ways of interacting with our computers.

At 9:28 AM, Gary Flood of MasterCard joins Perlmutter on stage to discuss how Intel can make the e-commerce experience better for both users and merchants. According to Flood, e-commerce needs to be secure, non-intrusive, seamless, and fluid for both consumers and merchants. That leads to a discussion of MasterCard’s PayPass wallet services. Following that is a demonstration of NFC (Near-Field Communications) sensors on next-generation Ultrabooks. This demo incorporates Intel Identity Protection Technology (IPT) to provide even more security and to associate the user with the endpoint (an ultrabook, in this case).

The next demonstration shows a couple of different applications running on both Atom and Core CPUs; Perlmutter uses a couple of Windows 8 applications as his example.

Perlmutter now introduces “Haswell,” Intel’s 22nm 4th generation Intel Core processor, designed with mobility in mind and intended for use in devices such as tables and ultrabooks all the way up to full-size workstations. He demonstrates graphics performance between the current-generation Core CPU and the next-generation Core CPU. The graphics performance of the next-generation CPU is significantly better, as one would expect.

Perlmutter now reviews the five Intel-based smartphones that are currently available on the market, and he discusses applying the same innovations shown earlier in the mobility context to the all-in-one (AIO) form factor. Perlmutter also shows off a Coca-Cola intelligent vending machine that is powered by an Intel Core i7 CPU.

The Intel vision is: “This decade we will create and extend computing technology to connect and enrich the lives of every person on earth.” The keynote ends with a video that talks about how people use Intel technologies to help solve the problems that face humanity.

And with that, the keynote concludes.